FIG. 19 shows an example of a time-base compressor in conventional time-base conversion systems. As means for compressing the time-base of input and output signals, this example of the time-base compressor is constructed to conduct a thinning operation of signal data to be written into a memory by a digital filter and by reading the signal. In the time-base compressor of this structure, a compression ratio of the time-base is determined by a thinning ratio for thinning data to be written into a memory.
The input analog signals are converter into digital signals having a prescribed sampling period based on the clock frequency by an AD converter 191. The clock signal is generated as a clock having a prescribed period by a clock signal generator 192. The converted digital signal data are thinned out by a digital filter 193 on the time-base in order to determine a required compression ratio, for instance, to compress the data to 3/4 times. An FIR type filter is often used for this digital filter 193. For the thinning operation, it is necessary to properly determine tap coefficients in order to take three signal data out of four different signal data continuous on the time-base. Examples of the tap coefficients are shown in FIG. 20.
The signal data thinned out on the time-base are written into a memory 194. The written signal data are read out in the same period as a prescribed sampling period according to the clock frequency of the clock generator 192 and the read digital signal data are converted into analog signals by an AD converter 195. The converted analog signals become to a compressed data that the input analog signal are compressed on a 3/4 times time-base. Thus, the time-base is compressed.
In such a time-base compressor, the digital filter 193 is used for thinning the time-base to compress the time-base. Generally, a filter comprising a digital circuit has an increased size and complicated circuit arrangement. It therefore often causes a bottleneck in the system. Further, when making a circuit scale small, it becomes difficult to achieve a desired performance.
In case of such a conventional time-base conversion system, filters such as FIR type filters are used for the time-base thinning operation and there is a problem that a circuit scale becomes large and the circuit arrangement is complicated. If tried to make a circuit scale small in this construction, it is difficult to achieve a desired performance.
FIG. 21 shows another example of conventional time-base compressors for solving the problems as described above. This is a time-base compressor constructed to achieve the time-base compression by making the memory write clock frequency and read clock frequency different from each other by means of compressing time-bases of input and output signals.
In the time-base compressor having the above construction, a read clock is generated by multiplying a write clock, and a time-base compression ratio is fixed by determining a multiplication ratio.
Input analog signals are converted into digital signals having a prescribed sampling period based on the write clock frequency. This write clock is generated as a clock having a prescribed period by a clock generator 212. The converted digital signals are written into a memory 213 based on the write clock.
On the other hand, a read clock is generated by multiplying the write clock generated in the clock generator 212 by a multiplier 214 with a 4/3 times multiplication ratio. This multiplying operation is performed by using, for instance, a PLL. The signal data written into the memory by the write clock are read based on the read clock. The read digital signal data are converted into analog signals by a DA converter 215. The converted output analog signals are turned to data that are obtained by compressing input analog signals on the 3/4 times time-base through the signal processing described above. The time-base compression can be thus performed.
In this time-base compressor, a digital filter is not required to perform the time-base compression for the time-base thinning. Therefore, the circuit construction is made simple and it becomes more easy to achieve a system than the conventional apparatus described above. However, as the time-base is compressed corresponding to a multiplication ratio of the write clock based on the write clock to the memory 213, there is such a problem that the read clock frequency increases by a multiple of the compression ratio. That is, because the read clock will be increased corresponding to a compression ratio, the access speed to the memory 213 or the operating speed of the AD converter 215 excedes its upper limit when the compression ratio increases. As a result, it becomes difficult to achieve the time-base conversion system.
As described above, in a conventional time-base compressor, the problem involved in the time-base compressor explained in FIG. 19 can be settled. However, there is another problem that it becomes difficult to achieve a time-base compressor if a large compression ratio is used because the time-base compression is made by varying a read clock based on the read clock to a memory. Consequently a read clock frequency is increased too high and the upper limit of a memory access speed or that of the operating speed of a DA converter exceeds its operable limit.
In addition, the conventional time-base conversion system has such a problem that one clock jitter occurs between the write clock and the read clock, and a reproduced video picture with a satisfactory quality cannot be obtained in a system where read and write clock frequencies are different each other.
As described above, in a conventional time-base conversion system, there were such problems that use of a time-base thinning filter renders the circuit scale large and complicated, making it hard to get a desired performance, if the circuit scale is reduced. In a time-base conversion system without using a filter, it becomes difficult to achieve a system when the read clock frequency is increased higher if a compression ratio is made large because the time-base is compressed by changing the read clock based on the write clock. Also, one clock jitter occurs between the write and the read clocks if they are different in frequency with each other, preventing reproduction of a video picture with a satisfactory quality.